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| N-Channel JFET Monolithic Dual CORPORATION SST404 / SST405 / SST406 FEATURES DESCRIPTION The SST404 Series is a very Low Noise Monolithic N-Channel JFET Pair in a surface mount SO-8 plastic package. Designed utilizing Calogic's proprietary JFET processing techniques these devices are ideal for front end amplification of low level signals. The low noise, low leakage and good frequency response are excellent features for sensitive medical, instrumentation and infrared designs. ORDERING INFORMATION Part SST404-6 Package Plastic SO-8 Temperature Range -55oC to +125oC * Very Low Noise . . . . . . . . . . . . . en < 10 nV/ Hz @ 10Hz ...... I * Low Input Bias . .Voltage.. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. BG < 2pA V > 50V * High Breakdown * Precision Instrumentation * Input Amplifiers * Impedance Converters APPLICATIONS NOTE: For Sorted Chips in Carriers, See U401 Series PIN CONFIGURATIONS SO-8 TOP VIEW (1) S1 (2) D1 (3) G1 (4) N/C N/C (8) G2 (7) D2 (6) S2 (5) CJ2 PRODUCT MARKING SST404 SST405 SST406 R04 R05 R06 SST404 / SST405 / SST406 CORPORATION ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) Parameter/Test Condition Gate-Drain Voltage Gate-Source Voltage Forward Gate Current Power Dissipation (per side) (total) Power Derating (per side) (total) Operating Junction Temperature Storage Temperature Lead Temperature (1/16" from case for 10 seconds) Symbol VGD VGS IG PD Limit -50 -50 10 300 500 2.4 4 -55 to 150 -55 to 200 300 Unit V V mA mW mW mW/ oC mW/ oC o C o C o C TJ Tstg TL ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise noted) SYMBOL STATIC V(BR)GSS V(BR)G1 - G2 VGS(OFF ) IDSS IGSS Gate-Source Breakdown Voltage Gate-Gate Breakdown Voltage Gate-Source Cut off Voltage Saturation Drain Current 2 Gate Reverse Current -58 -58 -1.5 3.5 -2 -1 Gate Operating Current Drain-Source On-Resistance Gate-Source Voltage Gate-Source Forward Voltage -2 -0.8 rDS(ON) VGS VGS(F) DYNAMIC gfs gos gfs gos Ciss Crss en MATCHING | VGS1 - VGS2 | Differential Gate-Source Voltage | VGS1 - VGS2 | Gate-Source Voltage Differential Change with Temperature T CMRR Common Mode Rejection Ratio 102 95 15 25 25 90 20 40 40 40 80 80 mV V/ oC dB VDG = 10V, ID = 200A TA = -55 to 25 oC VDG = 10V, TA = 25 to 125oC ID = 200A VDG = 10 to 20V, ID = 200A Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance Equivalent Input Noise Voltage 1.5 10 1.5 1.3 1.5 10 2 1 2 2 7 20 8 3 20 2 1 2 2 7 20 8 3 20 2 1 2 2 7 20 8 3 20 nV/ Hz pF mS S VDG = 15V, ID = 200A f = 1kHz VDS = 10V, VGS = 0V f = 1kHz VDG = 15V, ID = 200A f = 1MHz VDG = 15V, I D = 200A f = 10Hz 250 -1 0.7 -2.3 -2.3 -2.3 -15 -10 -15 -10 -15 -10 -50 50 -50 50 -50 50 V IG = -1A, VDS = 0V IG = 1A, VDS = 0V, VGS = 0V VDS = 15V, ID = 1nA mA pA nA pA nA V VDS = 15V, VGS = 0V VGS = -30V, VDS = 0V TA = 125 oC VDG = 15V, ID = 200A TA = 125 oC VGS = 0V, I D = 0.1mA VDG = 15V, ID = 200A IG = 1mA, VDS = 0V CHARACTERISTCS TYP1 SST404 SST405 SST406 UNIT TEST CONDITIONS MIN MAX MIN MAX MIN MAX -0.5 -2.5 -0.5 -2.5 -0.5 -2.5 0.5 10 -25 0.5 10 -25 0.5 10 -25 IG NOTES: 1. For design aid only, not subject to production testing. 2. Pulse test; PW = 300s, duty cycle 3%. |
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